Memory - Segment

1 - About

A memory segment is the division structure of the segmented memory model.

The physical address spec (physical memory) of the primary memory is divide by segment. See addressing

This article is about a physical segment but the virtual memory implements also virtual segment ????

3 - Addressing

To address a byte in a segment, a program issues a logical address that maps to a linear address.

Internally, all the segments that are defined for a system are mapped into the processor’s linear address space.

To access a memory location, the processor translates transparently each logical address into a linear address.

4 - Usage

4.1 - Reliability

The primary reason for using segmented memory is to increase the reliability of programs and systems. For example, placing a program’s stack in a separate segment prevents the stack from growing into the code or data space and overwriting instructions or data, respectively.

Code, data, and stacks are therefore typically contained in separate segments. and a program will have many independent address spaces (one segment).

A program may have many independent of them to keep the type of data separate:

Then :

See type

4.2 - Shared Memory

Certain segments may even be shared between programs. See: shared memory

5 - Management

5.1 - Selector

A segment selector is the unique identifier of a segment and is used in the first part of logical address. See Memory Segment - Segment Selector

5.2 - Register

5.3 - Type

As in a segmented model, the memory is split, the type of bit that they contains is different and it permits to increase reliability. See reliability

Segment Type Section
Code Assembly - Text Section
Data Assembly - Data Section (DS)
Assembly - BSS section, segment
Stack Assembly - Stack Segment (SS) or Stack space

5.4 - Number

Programs running on an IA-32 processor can address up to 16,383 segments of different:

5.5 - Size

On IA-32 processor, each segment can be as large as 232 bytes.

5.6 - Address space

A segment creates an address spaces that is addressable.

Internally, all the segments are mapped into the processor’s linear address space.

6 - Documentation / Reference


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